Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
20
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
7.8 ns @ 2.7 V
Maximum Operating Supply Voltage
3.6 V
Dimensions
12.8 x 7.52 x 2.35mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
12.8mm
Height
2.35mm
Width
7.52mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
Please check again later.
P.O.A.
25
P.O.A.
25
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
20
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
7.8 ns @ 2.7 V
Maximum Operating Supply Voltage
3.6 V
Dimensions
12.8 x 7.52 x 2.35mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
12.8mm
Height
2.35mm
Width
7.52mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22