Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V
Dimensions
2.9 x 1.6 x 1.15mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
2.9mm
Width
1.6mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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€ 0.283
Each (In a Pack of 25) (ex VAT)
25
€ 0.283
Each (In a Pack of 25) (ex VAT)
25
Buy in bulk
quantity | Unit price | Per Pack |
---|---|---|
25 - 100 | € 0.283 | € 7.08 |
125 - 225 | € 0.283 | € 7.08 |
250 - 600 | € 0.26 | € 6.49 |
625 - 1225 | € 0.236 | € 5.90 |
1250+ | € 0.212 | € 5.31 |
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V
Dimensions
2.9 x 1.6 x 1.15mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
2.9mm
Width
1.6mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22